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#	Item
361	Certifying Program Execution with Secure Processors Benjie Chen Robert Morris MIT Laboratory for Computer Science {benjie,rtm}@lcs.mit.edu Abstract Cerium is a trusted computing architecture that protects Add to Reading List Source URL: pdos.csail.mit.edu Language: English - Date: 2003-06-03 23:21:03 Central processing unit Trusted computing Booting Ring Operating system Kernel Next-Generation Secure Computing Base CPU cache BIOS Computer architecture Computing System software
362	The Effects of Memory-Rich Environments on File System Microbenchmarks An-I A. Wang, Computer Science Department UCLA, Geoffrey Kuenning, Computer Science Department, Harvey Mudd College, geoff@cs. Add to Reading List Source URL: lasr.cs.ucla.edu Language: English - Date: 2003-10-29 13:35:14 Computer performance CPU cache Cache Central processing unit Software optimization Bonnie++ Fragmentation File system fragmentation Log-structured file system Computing Computer memory Computer hardware
363	FPGA Implementation of a Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability George Kalokerinos, Vassilis Papaefstathiou, George Nikiforos, Stamatis Kavadias, Manolis Katevenis, Dionisios Pne Add to Reading List Source URL: www.ics.forth.gr Language: English - Date: 2013-12-23 07:16:59 CPU cache Scratchpad memory Direct memory access Cache Remote direct memory access AMD 10h Memory hierarchy Cell Synchronous dynamic random-access memory Computer memory Computer hardware Computing
364	Prototyping a Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability George Kalokerinos, Vassilis Papaefstathiou, George Nikiforos, Stamatis Kavadias, Manolis Katevenis, Dionisios Pnevmatikatos Add to Reading List Source URL: www.ics.forth.gr Language: English - Date: 2013-12-23 07:16:59 Scratchpad memory CPU cache Remote direct memory access Direct memory access Cache Memory hierarchy Computer memory Computer hardware Computing
365	A run-time Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability George Nikiforos, George Kalokairinos, Vassilis Papaefstathiou, Stamatis Kavadias, Dionisis Pnevmatikatos and Manolis Katevenis Add to Reading List Source URL: www.ics.forth.gr Language: English - Date: 2013-12-23 07:16:59 CPU cache Scratchpad memory Direct memory access Cache AMD 10h Memory hierarchy Cell Computer hardware Computer memory Computing
366	HP ProLiant BL280c G6 Server Blade Data sheet The HP ProLiant BL280c G6 Server Blade offers significant power savings for constrained cluster environments while supporting the newest, highest-performing technology to imp Add to Reading List Source URL: www.oldamericaninc.net Language: English - Date: 2013-08-28 02:57:58 Xeon Nehalem Intel Core CPU cache ProLiant Sandy Bridge Itanium Computer hardware Computing Computer architecture
367	License Copyright © 2008 Ciaran McHale. Permission is hereby granted, free of charge, to any person obtaining a copy of this training course and associated documentation files (the “Training Course"), to deal in the T Add to Reading List Source URL: www.ciaranmchale.com Language: English - Date: 2008-05-17 08:17:25 Microprocessors Parallel computing Central processing unit Computer memory Scalability Multi-core processor CPU cache Lock Cache Computing Concurrent computing Threads
368	#1 ELECTRONIC RESOURCE 2005 Design, implementation, and testing of a software interface between the AN/SPS 65(V)1 radar and the SRC6E reconfigurable computer / Thomas G. Guthrie Guthrie Add to Reading List Source URL: www.nps.edu Language: English - Date: 2013-06-21 18:22:02 Integrated circuits Digital electronics Logic families Computer memory Gallium arsenide Radiation hardening MESFET CPU cache CMOS Electronics Electronic engineering Electromagnetism
369	Efficient MRC Construction with SHARDS Carl A. Waldspurger, Nohhyun Park, Alexander Garthwaite, and Irfan Ahmad, CloudPhysics, Inc. https://www.usenix.org/conference/fast15/technical-sessions/presentation/waldspurger Th Add to Reading List Source URL: www.usenix.org Language: English - Date: 2015-05-05 03:57:23 Search algorithms Sampling CPU cache Central processing unit Computer memory Computer programming Hash table Lookup table Sample size determination Computing Statistics Cache
370	SmartIO Blueprint Intelligent data caching with Symantec Storage Foundation and High Availability Solutions for Solaris Table of Contents 0BWhy SmartIO? ................................................................... Add to Reading List Source URL: www.symantec.com Language: English - Date: 2015-04-08 03:09:32 Disk file systems Information Computer storage Cache Solid-state drive CPU cache IOPS Veritas File System Page cache Computing Computer hardware Computer memory

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